Applied Materials, Inc. unveiled a new way to engineer the wiring of advanced logic chips that enables scaling to the 3nm node and beyond. While size reduction benefits transistor performance, the opposite is true in the interconnect wiring: smaller wires have greater electrical resistance which reduces performance and increases power consumption. Without a materials engineering breakthrough, interconnect via resistance would increase by a factor of 10 from the 7nm node to the 3nm node, negatin...